IBM PC expansion card latency












4















In the IBM PC and early successors and compatibles, it was commonplace for most of the computer's memory to be on cards in general expansion slots. (e.g. the original IBM PC could take 64K on the motherboard, but to get up to the 256K needed for Lotus 1-2-3, you had to use expansion cards of 64K each.) Even after this stopped being necessary thanks to higher density RAM chips, video memory would still be on an expansion card.



Was the latency for the CPU to access these memory banks, the same as it was for main memory on the motherboard? Or were there any models on which the CPU had to incur wait states accessing cards?










share|improve this question



























    4















    In the IBM PC and early successors and compatibles, it was commonplace for most of the computer's memory to be on cards in general expansion slots. (e.g. the original IBM PC could take 64K on the motherboard, but to get up to the 256K needed for Lotus 1-2-3, you had to use expansion cards of 64K each.) Even after this stopped being necessary thanks to higher density RAM chips, video memory would still be on an expansion card.



    Was the latency for the CPU to access these memory banks, the same as it was for main memory on the motherboard? Or were there any models on which the CPU had to incur wait states accessing cards?










    share|improve this question

























      4












      4








      4








      In the IBM PC and early successors and compatibles, it was commonplace for most of the computer's memory to be on cards in general expansion slots. (e.g. the original IBM PC could take 64K on the motherboard, but to get up to the 256K needed for Lotus 1-2-3, you had to use expansion cards of 64K each.) Even after this stopped being necessary thanks to higher density RAM chips, video memory would still be on an expansion card.



      Was the latency for the CPU to access these memory banks, the same as it was for main memory on the motherboard? Or were there any models on which the CPU had to incur wait states accessing cards?










      share|improve this question














      In the IBM PC and early successors and compatibles, it was commonplace for most of the computer's memory to be on cards in general expansion slots. (e.g. the original IBM PC could take 64K on the motherboard, but to get up to the 256K needed for Lotus 1-2-3, you had to use expansion cards of 64K each.) Even after this stopped being necessary thanks to higher density RAM chips, video memory would still be on an expansion card.



      Was the latency for the CPU to access these memory banks, the same as it was for main memory on the motherboard? Or were there any models on which the CPU had to incur wait states accessing cards?







      hardware ibm-pc memory






      share|improve this question













      share|improve this question











      share|improve this question




      share|improve this question










      asked 5 hours ago









      rwallacerwallace

      7,914336111




      7,914336111






















          2 Answers
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          1














          Same. At least for The PC.



          Later machines where ofc. throttled accordingly to keep slot access speed within the original spec. What else should they have done?



          But they tried, and form there on it gets complicated.



          The PC-AT did run 1 wait state on each 16 bit access, IO or meomory, internal or card. Thus allowing 'full speed'. But inserted 4 wait states for any 8 bit card access - working as a slow down to even a little less than PC speed, making sure 'old' 8 bit cards will comply.



          This was done by the card pulling IO16 or M16 whenever it decoded an address as theirs and 'decided' to support 16 bit access - or better one should say fast access, as this of course also worked with any access, 8 or 16, as long as IO16/M16 was pulled during the initial clock cycle. A 'real' 16 bit access (reading or writing a word) would, without O16/M16 pulled, be split into two 8 bit accesses by the PC glue logic, each with its own 4 wait states.



          This way a 16 bit memory expansion could work at full speed, while 8 bit I/O cards worked at a PC-alike access timing.



          To make things even more complicate, NOWS (NO Wait State) pulled during the middle of any access cycle would stop the wait state generation with that cycle (*1). Alternatively CHRDY (CHanel ReaDY) could be used to extend wait state generation as long as needed (*2,3).





          And somewhat related, there where also what I would call 'virtual' 16 bit cards. Most notably here some of the first faster VGA clones. They where usually sold as 16 Bit VGA, but in reality they where 8 bit designs. After all, the original VGA is an 8 bit design, and so where (most) compatible. The trick here was to implement the byte/word glue logic onto the card. A write access was always accepted with IO16/M16, just to be handed toward the controller as two 8 bit transfers - while the 80286 continued its duty. On a read the wait state was used to fetch both bytes from the card.



          Of course there where also real 16 bit VGA cards later on. But that were newer controllers and designs.



          Oh, and then there's the case of mixed display adaptors. As soon as there is one 8 bit display adaptor in a system all will be accessed as 8 bit. Thus mixing one of the nice 'virtual' 16 Bit VGA with an MDA will pull the VGA down to PC speed again - unless it also used NOWS that is, then it's only slowed to 8 bit speed.





          *1 - So an 8 bit cycle could be cut short at the first, second or third cycle as well.



          *2 - Both signals where already available with the PC.



          *3 - Pulling both created an undefined state.






          share|improve this answer


























          • Good point - you can't just run a card faster than it was specified for. Though later when there are 16-bit cards, you could presumably at least assume these can handle 6 MHz (AT speed) rather than being limited to 4.77 MHz?

            – rwallace
            4 hours ago






          • 1





            Well, yes ... and from there on it gets complicated :))

            – Raffzahn
            3 hours ago



















          4














          The number of wait states added for a memory cycle did not depend directly on whether the memory was on the system board or an expansion card, but it was possible for either or both to add a wait state.



          The original IBM PC added 1 wait state for system board memory accesses but it was possible for a memory expansion card to run at 0 wait states by asserting the NOWS line during an access cycle. I don't know whether there were any memory expansion boards that actually did this or not.



          Later, the XT 286 supported 0 wait states for its system board RAM which made it perform faster than the 1-wait-state AT at the same clock speed.



          Eventually when the bus clock became separated from the CPU clock, it was then very common for expansion card memory to be significantly slower than system board memory, simply due to being limited to the bus speed (typically 8MHz) rather than the 'native' CPU speed. But for the PC, XT and AT the bus speed was the same as the CPU speed so this was not a factor.






          share|improve this answer























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            2 Answers
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            2 Answers
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            1














            Same. At least for The PC.



            Later machines where ofc. throttled accordingly to keep slot access speed within the original spec. What else should they have done?



            But they tried, and form there on it gets complicated.



            The PC-AT did run 1 wait state on each 16 bit access, IO or meomory, internal or card. Thus allowing 'full speed'. But inserted 4 wait states for any 8 bit card access - working as a slow down to even a little less than PC speed, making sure 'old' 8 bit cards will comply.



            This was done by the card pulling IO16 or M16 whenever it decoded an address as theirs and 'decided' to support 16 bit access - or better one should say fast access, as this of course also worked with any access, 8 or 16, as long as IO16/M16 was pulled during the initial clock cycle. A 'real' 16 bit access (reading or writing a word) would, without O16/M16 pulled, be split into two 8 bit accesses by the PC glue logic, each with its own 4 wait states.



            This way a 16 bit memory expansion could work at full speed, while 8 bit I/O cards worked at a PC-alike access timing.



            To make things even more complicate, NOWS (NO Wait State) pulled during the middle of any access cycle would stop the wait state generation with that cycle (*1). Alternatively CHRDY (CHanel ReaDY) could be used to extend wait state generation as long as needed (*2,3).





            And somewhat related, there where also what I would call 'virtual' 16 bit cards. Most notably here some of the first faster VGA clones. They where usually sold as 16 Bit VGA, but in reality they where 8 bit designs. After all, the original VGA is an 8 bit design, and so where (most) compatible. The trick here was to implement the byte/word glue logic onto the card. A write access was always accepted with IO16/M16, just to be handed toward the controller as two 8 bit transfers - while the 80286 continued its duty. On a read the wait state was used to fetch both bytes from the card.



            Of course there where also real 16 bit VGA cards later on. But that were newer controllers and designs.



            Oh, and then there's the case of mixed display adaptors. As soon as there is one 8 bit display adaptor in a system all will be accessed as 8 bit. Thus mixing one of the nice 'virtual' 16 Bit VGA with an MDA will pull the VGA down to PC speed again - unless it also used NOWS that is, then it's only slowed to 8 bit speed.





            *1 - So an 8 bit cycle could be cut short at the first, second or third cycle as well.



            *2 - Both signals where already available with the PC.



            *3 - Pulling both created an undefined state.






            share|improve this answer


























            • Good point - you can't just run a card faster than it was specified for. Though later when there are 16-bit cards, you could presumably at least assume these can handle 6 MHz (AT speed) rather than being limited to 4.77 MHz?

              – rwallace
              4 hours ago






            • 1





              Well, yes ... and from there on it gets complicated :))

              – Raffzahn
              3 hours ago
















            1














            Same. At least for The PC.



            Later machines where ofc. throttled accordingly to keep slot access speed within the original spec. What else should they have done?



            But they tried, and form there on it gets complicated.



            The PC-AT did run 1 wait state on each 16 bit access, IO or meomory, internal or card. Thus allowing 'full speed'. But inserted 4 wait states for any 8 bit card access - working as a slow down to even a little less than PC speed, making sure 'old' 8 bit cards will comply.



            This was done by the card pulling IO16 or M16 whenever it decoded an address as theirs and 'decided' to support 16 bit access - or better one should say fast access, as this of course also worked with any access, 8 or 16, as long as IO16/M16 was pulled during the initial clock cycle. A 'real' 16 bit access (reading or writing a word) would, without O16/M16 pulled, be split into two 8 bit accesses by the PC glue logic, each with its own 4 wait states.



            This way a 16 bit memory expansion could work at full speed, while 8 bit I/O cards worked at a PC-alike access timing.



            To make things even more complicate, NOWS (NO Wait State) pulled during the middle of any access cycle would stop the wait state generation with that cycle (*1). Alternatively CHRDY (CHanel ReaDY) could be used to extend wait state generation as long as needed (*2,3).





            And somewhat related, there where also what I would call 'virtual' 16 bit cards. Most notably here some of the first faster VGA clones. They where usually sold as 16 Bit VGA, but in reality they where 8 bit designs. After all, the original VGA is an 8 bit design, and so where (most) compatible. The trick here was to implement the byte/word glue logic onto the card. A write access was always accepted with IO16/M16, just to be handed toward the controller as two 8 bit transfers - while the 80286 continued its duty. On a read the wait state was used to fetch both bytes from the card.



            Of course there where also real 16 bit VGA cards later on. But that were newer controllers and designs.



            Oh, and then there's the case of mixed display adaptors. As soon as there is one 8 bit display adaptor in a system all will be accessed as 8 bit. Thus mixing one of the nice 'virtual' 16 Bit VGA with an MDA will pull the VGA down to PC speed again - unless it also used NOWS that is, then it's only slowed to 8 bit speed.





            *1 - So an 8 bit cycle could be cut short at the first, second or third cycle as well.



            *2 - Both signals where already available with the PC.



            *3 - Pulling both created an undefined state.






            share|improve this answer


























            • Good point - you can't just run a card faster than it was specified for. Though later when there are 16-bit cards, you could presumably at least assume these can handle 6 MHz (AT speed) rather than being limited to 4.77 MHz?

              – rwallace
              4 hours ago






            • 1





              Well, yes ... and from there on it gets complicated :))

              – Raffzahn
              3 hours ago














            1












            1








            1







            Same. At least for The PC.



            Later machines where ofc. throttled accordingly to keep slot access speed within the original spec. What else should they have done?



            But they tried, and form there on it gets complicated.



            The PC-AT did run 1 wait state on each 16 bit access, IO or meomory, internal or card. Thus allowing 'full speed'. But inserted 4 wait states for any 8 bit card access - working as a slow down to even a little less than PC speed, making sure 'old' 8 bit cards will comply.



            This was done by the card pulling IO16 or M16 whenever it decoded an address as theirs and 'decided' to support 16 bit access - or better one should say fast access, as this of course also worked with any access, 8 or 16, as long as IO16/M16 was pulled during the initial clock cycle. A 'real' 16 bit access (reading or writing a word) would, without O16/M16 pulled, be split into two 8 bit accesses by the PC glue logic, each with its own 4 wait states.



            This way a 16 bit memory expansion could work at full speed, while 8 bit I/O cards worked at a PC-alike access timing.



            To make things even more complicate, NOWS (NO Wait State) pulled during the middle of any access cycle would stop the wait state generation with that cycle (*1). Alternatively CHRDY (CHanel ReaDY) could be used to extend wait state generation as long as needed (*2,3).





            And somewhat related, there where also what I would call 'virtual' 16 bit cards. Most notably here some of the first faster VGA clones. They where usually sold as 16 Bit VGA, but in reality they where 8 bit designs. After all, the original VGA is an 8 bit design, and so where (most) compatible. The trick here was to implement the byte/word glue logic onto the card. A write access was always accepted with IO16/M16, just to be handed toward the controller as two 8 bit transfers - while the 80286 continued its duty. On a read the wait state was used to fetch both bytes from the card.



            Of course there where also real 16 bit VGA cards later on. But that were newer controllers and designs.



            Oh, and then there's the case of mixed display adaptors. As soon as there is one 8 bit display adaptor in a system all will be accessed as 8 bit. Thus mixing one of the nice 'virtual' 16 Bit VGA with an MDA will pull the VGA down to PC speed again - unless it also used NOWS that is, then it's only slowed to 8 bit speed.





            *1 - So an 8 bit cycle could be cut short at the first, second or third cycle as well.



            *2 - Both signals where already available with the PC.



            *3 - Pulling both created an undefined state.






            share|improve this answer















            Same. At least for The PC.



            Later machines where ofc. throttled accordingly to keep slot access speed within the original spec. What else should they have done?



            But they tried, and form there on it gets complicated.



            The PC-AT did run 1 wait state on each 16 bit access, IO or meomory, internal or card. Thus allowing 'full speed'. But inserted 4 wait states for any 8 bit card access - working as a slow down to even a little less than PC speed, making sure 'old' 8 bit cards will comply.



            This was done by the card pulling IO16 or M16 whenever it decoded an address as theirs and 'decided' to support 16 bit access - or better one should say fast access, as this of course also worked with any access, 8 or 16, as long as IO16/M16 was pulled during the initial clock cycle. A 'real' 16 bit access (reading or writing a word) would, without O16/M16 pulled, be split into two 8 bit accesses by the PC glue logic, each with its own 4 wait states.



            This way a 16 bit memory expansion could work at full speed, while 8 bit I/O cards worked at a PC-alike access timing.



            To make things even more complicate, NOWS (NO Wait State) pulled during the middle of any access cycle would stop the wait state generation with that cycle (*1). Alternatively CHRDY (CHanel ReaDY) could be used to extend wait state generation as long as needed (*2,3).





            And somewhat related, there where also what I would call 'virtual' 16 bit cards. Most notably here some of the first faster VGA clones. They where usually sold as 16 Bit VGA, but in reality they where 8 bit designs. After all, the original VGA is an 8 bit design, and so where (most) compatible. The trick here was to implement the byte/word glue logic onto the card. A write access was always accepted with IO16/M16, just to be handed toward the controller as two 8 bit transfers - while the 80286 continued its duty. On a read the wait state was used to fetch both bytes from the card.



            Of course there where also real 16 bit VGA cards later on. But that were newer controllers and designs.



            Oh, and then there's the case of mixed display adaptors. As soon as there is one 8 bit display adaptor in a system all will be accessed as 8 bit. Thus mixing one of the nice 'virtual' 16 Bit VGA with an MDA will pull the VGA down to PC speed again - unless it also used NOWS that is, then it's only slowed to 8 bit speed.





            *1 - So an 8 bit cycle could be cut short at the first, second or third cycle as well.



            *2 - Both signals where already available with the PC.



            *3 - Pulling both created an undefined state.







            share|improve this answer














            share|improve this answer



            share|improve this answer








            edited 3 hours ago

























            answered 4 hours ago









            RaffzahnRaffzahn

            46.8k5104189




            46.8k5104189













            • Good point - you can't just run a card faster than it was specified for. Though later when there are 16-bit cards, you could presumably at least assume these can handle 6 MHz (AT speed) rather than being limited to 4.77 MHz?

              – rwallace
              4 hours ago






            • 1





              Well, yes ... and from there on it gets complicated :))

              – Raffzahn
              3 hours ago



















            • Good point - you can't just run a card faster than it was specified for. Though later when there are 16-bit cards, you could presumably at least assume these can handle 6 MHz (AT speed) rather than being limited to 4.77 MHz?

              – rwallace
              4 hours ago






            • 1





              Well, yes ... and from there on it gets complicated :))

              – Raffzahn
              3 hours ago

















            Good point - you can't just run a card faster than it was specified for. Though later when there are 16-bit cards, you could presumably at least assume these can handle 6 MHz (AT speed) rather than being limited to 4.77 MHz?

            – rwallace
            4 hours ago





            Good point - you can't just run a card faster than it was specified for. Though later when there are 16-bit cards, you could presumably at least assume these can handle 6 MHz (AT speed) rather than being limited to 4.77 MHz?

            – rwallace
            4 hours ago




            1




            1





            Well, yes ... and from there on it gets complicated :))

            – Raffzahn
            3 hours ago





            Well, yes ... and from there on it gets complicated :))

            – Raffzahn
            3 hours ago











            4














            The number of wait states added for a memory cycle did not depend directly on whether the memory was on the system board or an expansion card, but it was possible for either or both to add a wait state.



            The original IBM PC added 1 wait state for system board memory accesses but it was possible for a memory expansion card to run at 0 wait states by asserting the NOWS line during an access cycle. I don't know whether there were any memory expansion boards that actually did this or not.



            Later, the XT 286 supported 0 wait states for its system board RAM which made it perform faster than the 1-wait-state AT at the same clock speed.



            Eventually when the bus clock became separated from the CPU clock, it was then very common for expansion card memory to be significantly slower than system board memory, simply due to being limited to the bus speed (typically 8MHz) rather than the 'native' CPU speed. But for the PC, XT and AT the bus speed was the same as the CPU speed so this was not a factor.






            share|improve this answer




























              4














              The number of wait states added for a memory cycle did not depend directly on whether the memory was on the system board or an expansion card, but it was possible for either or both to add a wait state.



              The original IBM PC added 1 wait state for system board memory accesses but it was possible for a memory expansion card to run at 0 wait states by asserting the NOWS line during an access cycle. I don't know whether there were any memory expansion boards that actually did this or not.



              Later, the XT 286 supported 0 wait states for its system board RAM which made it perform faster than the 1-wait-state AT at the same clock speed.



              Eventually when the bus clock became separated from the CPU clock, it was then very common for expansion card memory to be significantly slower than system board memory, simply due to being limited to the bus speed (typically 8MHz) rather than the 'native' CPU speed. But for the PC, XT and AT the bus speed was the same as the CPU speed so this was not a factor.






              share|improve this answer


























                4












                4








                4







                The number of wait states added for a memory cycle did not depend directly on whether the memory was on the system board or an expansion card, but it was possible for either or both to add a wait state.



                The original IBM PC added 1 wait state for system board memory accesses but it was possible for a memory expansion card to run at 0 wait states by asserting the NOWS line during an access cycle. I don't know whether there were any memory expansion boards that actually did this or not.



                Later, the XT 286 supported 0 wait states for its system board RAM which made it perform faster than the 1-wait-state AT at the same clock speed.



                Eventually when the bus clock became separated from the CPU clock, it was then very common for expansion card memory to be significantly slower than system board memory, simply due to being limited to the bus speed (typically 8MHz) rather than the 'native' CPU speed. But for the PC, XT and AT the bus speed was the same as the CPU speed so this was not a factor.






                share|improve this answer













                The number of wait states added for a memory cycle did not depend directly on whether the memory was on the system board or an expansion card, but it was possible for either or both to add a wait state.



                The original IBM PC added 1 wait state for system board memory accesses but it was possible for a memory expansion card to run at 0 wait states by asserting the NOWS line during an access cycle. I don't know whether there were any memory expansion boards that actually did this or not.



                Later, the XT 286 supported 0 wait states for its system board RAM which made it perform faster than the 1-wait-state AT at the same clock speed.



                Eventually when the bus clock became separated from the CPU clock, it was then very common for expansion card memory to be significantly slower than system board memory, simply due to being limited to the bus speed (typically 8MHz) rather than the 'native' CPU speed. But for the PC, XT and AT the bus speed was the same as the CPU speed so this was not a factor.







                share|improve this answer












                share|improve this answer



                share|improve this answer










                answered 4 hours ago









                Ken GoberKen Gober

                7,74712039




                7,74712039






























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